The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological progress in IC manufacture has produced several generations of ICs, and each generation fabricates smaller and more complex circuits than the previous generation. Currently, the semiconductor industry has progressed into nanometer technology nodes for higher device density and better electrical performance. In the past, the reductions of the feature size were limited by the ability to define the structures photo-lithographically. Recently, device geometries having smaller dimensions created new challenges. For example, for two adjacent conductive lines, when the distance between the conductive lines is decreased, the semiconductor devices suffer from several electrical and processes issues. Conventional techniques have not been entirely satisfactory in all respects.